TR-2022-02
Updown Instruction Set Architecture v0.9
Andrew A Chien; S R Andronicus; Marziyeh Nourian; Chen Zou; Yuanwei Fang. 21 January, 2022.
Communicated by Andrew Chien.
Abstract
The UpDown accelerator is a low-power near-memory computation, data movement, and recoding engine designed to support memory sweep, efficient encoding, and sparse computations efficiently. The UpDown v0.9 instruction set builds on the Unstructured Data Processor (UDP) and Unified Automata Processor (UAP) work that are in turn and outgrowth of the 10x10 project.
Original Document
The original document is available in PDF (uploaded 21 January, 2022 by
Andrew Chien).
